DocumentCode
1341188
Title
A stochastic wire-length distribution for gigascale integration (GSI). I. Derivation and validation
Author
Davis, Jeffrey A. ; De, Vivek K. ; Meindl, James D.
Author_Institution
Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Volume
45
Issue
3
fYear
1998
fDate
3/1/1998 12:00:00 AM
Firstpage
580
Lastpage
589
Abstract
Based on Rent´s Rule, a well-established empirical relationship, a rigorous derivation of a complete wire-length distribution for on-chip random logic networks is performed. This distribution is compared to actual wire-length distributions for modern microprocessors, and a methodology to calculate the wire-length distribution for future gigascale integration (GSI) products is proposed
Keywords
integrated circuit interconnections; integrated circuit modelling; integrated logic circuits; microprocessor chips; stochastic processes; GSI; Rent´s Rule; gigascale integration; microprocessor; on-chip random logic network; stochastic wire length distribution; Density functional theory; Logic arrays; Microprocessors; Network-on-a-chip; Pins; Power system interconnection; Power system modeling; Stochastic processes; Stochastic systems; Wiring;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.661219
Filename
661219
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