Title :
Overview of complementary GaAs technology for high-speed VLSI circuits
Author :
Brown, Richard B. ; Bernhardt, Bruce ; LaMacchia, Mike ; Abrokwah, Jon ; Parakh, Phiroze N. ; Basso, Todd D. ; Gold, Spencer M. ; Stetson, Sean ; Gauthier, Claude R. ; Foster, David ; Crawforth, Brian ; McQuire, Timothy ; Sakallah, Karem ; Lomax, Ronald J
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fDate :
3/1/1998 12:00:00 AM
Abstract :
A self-aligned complementary GaAs (CGaAs) technology (developed at Motorola) for low-power, portable, digital and mixed-mode circuits is being extended to address high-speed VLSI circuit applications. The process supports full complementary, unipolar (pseudo-DCFL), source-coupled, and dynamic (domino) logic families. Though this technology is not yet mature, it is years ahead of CMOS in terms of fast gate delays at low power supply voltages. Complementary circuits operating at 0.9 V have demonstrated power-delay products of 0.01 /spl mu/W/MHz/gate. Propagation delays of unipolar circuits are as low as 25 ps. Logic families can be mixed on a chip to trade power for delay. CGaAs is being evaluated for VLSI applications through the design of a PowerPC-architecture microprocessor.
Keywords :
III-V semiconductors; VLSI; field effect logic circuits; gallium arsenide; integrated circuit technology; microprocessor chips; 0.9 V; 25 ps; GaAs; PowerPC-architecture microprocessor; dynamic domino logic; high-speed VLSI circuit; low-power portable digital circuit; power-delay product; pseudo-DCFL logic; self-aligned complementary GaAs technology; source-coupled logic; unipolar circuit; CMOS technology; Circuits; Clocks; Delay; Frequency; Gallium arsenide; Gold; Microprocessors; Pipeline processing; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on