DocumentCode
1341904
Title
Low-power VCO with phase-noise improvement in 0.18 μm CMOS technology
Author
Liang, C.-P. ; Huang, Ting-Jui ; Rao, P.-Z. ; Chung, Soon-Jo
Author_Institution
Inst. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
46
Issue
20
fYear
2010
Firstpage
1385
Lastpage
1387
Abstract
A low-power 5.25 GHz voltage-controlled oscillator (VCO) with phase-noise improvement is designed in a 0.18 μm CMOS 1P6M process. Owing to the use of a larger value of parallel capacitor, an additional harmonic-suppressed capacitor, and an appropriate bulk bias voltage of transistor, a good figure of merit of -190 dBc/Hz can be achieved without extra chip area and CMOS process steps. The fabricated VCO operates from 5.12 to 5.36 GHz with a core power consumption of 1.9 mW and active chip area of 0.15 mm2. The measured phase noise at 1 MHz offset is about -119 dBc/Hz.
Keywords
CMOS integrated circuits; capacitors; harmonics suppression; microwave oscillators; phase noise; voltage-controlled oscillators; CMOS technology; frequency 1 MHz; frequency 5.12 GHz to 5.36 GHz; harmonic-suppressed capacitor; low-power VCO; parallel capacitor; phase noise measurement; phase-noise improvement; power 1.9 mW; power consumption; size 0.18 mum; voltage-controlled oscillator;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2010.1278
Filename
5593966
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