Analysis of Single-Event Transients in Integer- $N$ Frequency Dividers and Hardness Assurance Implications for Phase-Locked Loops

Single-event transients (SET) are analyzed in integer-N frequency dividers configured internal and external to a closed-loop phase-locked loop (PLL) circuit. Simulations, corroborated by experimental results, indicate that the location and gain of the frequency divider in any PLL arrangement strongly influence both the error rate of the PLL circuit and the propagation of transients through the closed-loop. The probability of an ion-strike causing output phase displacement values on the order of the operating-period can be significantly reduced by increasing the divisor of the stand-alone output frequency divider. Conversely, increasing the feedback divisor is shown to magnify SETs propagating through the closed-loop PLL.