DocumentCode
1342626
Title
Clock and Reset Transients in a 90 nm RHBD Single-Core Tilera Processor
Author
Cabanas-Holmen, M. ; Cannon, E.H. ; Kleinosowski, A. ; Ballast, J. ; Killens, J. ; Socha, J.
Author_Institution
Boeing Co., Seattle, WA, USA
Volume
56
Issue
6
fYear
2009
Firstpage
3505
Lastpage
3510
Abstract
A complex processor was synthesized using an RHBD cell library and fabricated in a commercial 90 nm CMOS technology. Single Event Effects testing revealed transients on the clock and global reset signals. These critical circuits will receive additional hardening in the next prototype design.
Keywords
CMOS integrated circuits; clocks; integrated circuit design; integrated circuit modelling; microcomputers; CMOS technology; RHBD cell library; Radiation Hardened by Design techniques; additional hardening; clock reset signals; complex processor; critical circuits; global reset signals; prototype design; single event effects; single-core Tilera processor; Circuit testing; Clocks; Flip-flops; Libraries; Logic testing; Prototypes; Radiation hardening; Random access memory; Single event upset; Clock transient; flip-flop; radiation effects; reset transient; single event transient (SET); single event upset (SEU);
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2009.2034314
Filename
5341395
Link To Document