Modeling of Alpha-Induced Single Event Upsets for 45 nm Node SOI Devices Using Realistic C4 and 3D Circuit Geometries

Author

Tang, Henry H K ; Murray, Conal E. ; Fiorenza, Giovanni ; Rodbell, Kenneth P. ; Heidel, David F.

Author_Institution

IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

56

Issue

6

fYear

2009

Firstpage

3093

Lastpage

3097

Abstract

Novel techniques have been applied to model realistic alpha particle source distributions in complex back-end-of-the-line geometries. Rigorous Monte Carlo simulations with high resolution have been performed to analyze the charge collection in 45 nm SOI test devices. These studies reveal soft fail sensitivity to the topologies of the alpha particle source and the BEOL structure.

Keywords

CMOS integrated circuits; Monte Carlo methods; SRAM chips; alpha-particle sources; silicon-on-insulator; 3D circuit geometries; BEOL structure; CMOS technology; Monte Carlo simulations; SOI test devices; SRAM circuits; alpha-induced single event upsets modeling; charge collection; complex back-end-of-the-line geometries; realistic C4 circuit geometries; realistic alpha particle source distributions; silicon on insulator technology; Alpha particles; CMOS technology; Circuit testing; Geometry; Life testing; Monte Carlo methods; Particle measurements; Silicon on insulator technology; Single event upset; Solid modeling; Alpha particle-induced soft errors; CMOS technology; radiation effects in SRAM circuits; silicon on insulator technology; single event upsets;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2009.2033923

Filename

5341414