• DocumentCode
    1343035
  • Title

    High-density interconnect board design for wafer-level packaging

  • Author

    Wu, Bin ; Brown, Ben ; Warner, E.

  • Author_Institution
    Intel Assembly & Test Technol. Dev., Folsom, CA, USA
  • Volume
    47
  • Issue
    20
  • fYear
    2011
  • Firstpage
    1137
  • Lastpage
    1138
  • Abstract
    The main advantage of wafer-level packaging is a smaller, thinner and lighter package with minimised electrical length and lower inductance. Presented is a printed circuit board electrical design to assemble a wafer-level package of a wireless radio core. The link impact and challenges are addressed in both time domain and frequency domain. The high-density interconnect substrate is analysed using a design of experiment technique to test the significance of structured variation. Its signal integrity and power delivery performance are compared with a similar design, but much thicker using a flip-chip package mounted on top of the conventional board. The thin board for wafer-level packaging provides better power delivery and signal performance than the traditional assembly.
  • Keywords
    frequency-domain analysis; integrated circuit interconnections; printed circuit design; radiocommunication; time-domain analysis; wafer level packaging; design of experiment technique; electrical length minimisation; flip-chip package; frequency domain; high-density interconnect board design; power delivery performance; printed circuit board electrical design; signal integrity performance; structured variation; time domain; wafer-level packaging; wireless radio core;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2011.1422
  • Filename
    6036064