Title :
Analysis of the behavior of a dynamic latch comparator
Author :
Cusinato, P. ; Bruccoleri, M. ; Caviglia, D.D. ; Valle, M.
Author_Institution :
SGS-Thomson Microelectron., Milan, Italy
fDate :
3/1/1998 12:00:00 AM
Abstract :
This brief deals with the behavior of a dynamic latch used as a voltage comparator. A detailed analysis of the fine settling phase is reported, putting in evidence the non-idealities which lead to comparison errors. A technique to minimize such errors is suggested. An experimental chip has been fabricated and measurements are reported and discussed
Keywords :
comparators (circuits); flip-flops; dynamic latch; settling phase; voltage comparator; Circuits; Digital filters; Finite impulse response filter; IIR filters; Image restoration; Interference; Latches; Performance loss; Signal processing; Voltage;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
