A CMOS analog winner-take-all network for large-scale applications

Author

Demosthenous, Andreas ; Smedley, Sean ; Taylor, John

Author_Institution

Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK

Volume

45

Issue

3

fYear

1998

fDate

3/1/1998 12:00:00 AM

Firstpage

300

Lastpage

304

Abstract

A CMOS scalable high-speed current-mode asynchronous winner-take-all (WTA) circuit is described. The new WTA has improved resolution and operating speed compared to other current-mode WTA´s, especially for large M, where M is the number of inputs. The proposed arrangement is, therefore, well suited to applications requiring large WTA systems where operating speed and resolution are important parameters [e.g., vector quantization (VQ)]. Measurements show that the proposed circuit can resolve input currents differing by less than 1 μA with negligible loss of operating speed. Detailed measured results and simulations are presented

Keywords

CMOS analogue integrated circuits; analogue processing circuits; neural chips; vector quantisation; CMOS analog winner-take-all network; current-mode circuit; input currents; large-scale applications; operating speed; resolution; vector quantization; Artificial neural networks; Circuit simulation; Current measurement; Current mode circuits; Degradation; Large-scale systems; Loss measurement; Vector quantization; Velocity measurement; Voltage;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.662705

Filename

662705