• DocumentCode
    134582
  • Title

    An analytical model for estimating execution cost of 1D array expressions

  • Author

    Gdura, Youssef Omran

  • Author_Institution
    Comput. Eng. Dept., Univ. of Tripoli, Tripoli, Libya
  • fYear
    2014
  • fDate
    26-27 March 2014
  • Firstpage
    133
  • Lastpage
    141
  • Abstract
    Compiler writers have developed various techniques, such as constant folding, subexpression elimination, loop transformation and vectorization, to help compilers in code optimization for performance improvement. Yet, they have been far less successful in developing techniques or cost models that compilers can rely on to simplify parallel programming and tune the performance of parallel applications automatically. This paper is the first of two-phase study to develop an analytical model that can be used to estimate the cost for sequential and parallel execution of array expressions on multicore architectures. While this paper discuss the possibility of developing a cost model to estimate the sequential execution of array expressions on a single CPU, the second part of the investigation shall focus on developing a model to estimate parallel execution of arrays on multicore platforms. The model presented in this paper is expected to be used by programming language compilers as complement component with the other model to estimate and subsequently decide whether to parallelize individual array expressions or not. The preliminary results which are presented here show that this model can give a satisfactory evaluation and high-precision estimation for the cost of executing a regular array expression on a single core processor.
  • Keywords
    costing; optimising compilers; parallel programming; parallelising compilers; 1D array expressions; CPU; code optimization; compiler writers; constant folding; cost estimation; execution cost; loop transformation; multicore architecture; multicore platform; parallel execution; parallel programming; performance improvement; programming language compilers; sequential execution; single core processor; subexpression elimination; vectorization; Analytical models; Arrays; Assembly; Optimization; Parallel programming; Program processors; Registers; array expressions; compiler techniques; cost model; optimizing; parallelizing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Information Technology (CSIT), 2014 6th International Conference on
  • Conference_Location
    Amman
  • Print_ISBN
    978-1-4799-3998-5
  • Type

    conf

  • DOI
    10.1109/CSIT.2014.6805991
  • Filename
    6805991