A dynamic analysis of the Dickson charge pump circuit

Author

Tanzawa, Toru ; Tanaka, Tomoharu

Author_Institution

ULSI Res. Center, Toshiba Corp., Kawasaki, Japan

Volume

32

Issue

8

fYear

1997

fDate

8/1/1997 12:00:00 AM

Firstpage

1231

Lastpage

1240

Abstract

Dynamics of the Dickson charge pump circuit are analyzed. The analytical results enable the estimation of the rise time of the output voltage and that of the power consumption during boosting. By using this analysis, the optimum number of stages to minimize the rise time has been estimated as 1.4 N_min, where N_min is the minimum value of the number of stages necessary for a given parameter set of supply voltage, threshold voltage of transfer diodes, and boosted voltage. Moreover, the self-load capacitance of the charge pump, which should be charged up at the same time as the output load capacitance of the charge pump, has been estimated as about one-third of the total charge pump capacitance. As a result, the equivalent circuit of the charge pump has been modified. The analytical results are in good agreement with simulation by the iteration method, typically within 10% for the rise time and within 2% for the power consumption. In the case of a charge pump with MOS transfer transistors, the analytical results of the rise time agree with the SPICE simulation within 10%

Keywords

EPROM; MOS analogue integrated circuits; SPICE; capacitance; circuit analysis computing; circuit optimisation; equivalent circuits; iterative methods; power integrated circuits; Dickson charge pump circuit; EEPROM; MOS transfer transistors; SPICE simulation; boosted voltage; dynamic analysis; equivalent circuit; iteration method; optimum number of stages; output load capacitance; output voltage; power IC; power consumption; rise time; self-load capacitance; simulation results; total charge pump capacitance; Analytical models; Boosting; Capacitance; Charge pumps; Circuit analysis; Circuit simulation; Diodes; Energy consumption; Equivalent circuits; Threshold voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.604079

Filename

604079