Title :
Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution
Author :
Andreani, P. ; Bigongiari, F. ; Roncella, R. ; Saletti, R. ; Terreni, P. ; Bigongiari, A. ; Lippi, M.
Author_Institution :
Dept. of Appl. Electron., Lund Univ., Sweden
fDate :
4/1/1998 12:00:00 AM
Abstract :
An eight-channel, 1 ns bin-size, 23 b dynamic range, single-chip, multihit, time-to-digital converter (TDC) is presented in this paper. A new architecture mixing two previous TDC realizations has been adopted. The chip can execute common-start or common-stop operations on the trailing, leading, or both transitions of the input channels; it stores at least 32 events/channel with a double-hit resolution of 16 ns. A prototype of about 120 mm2 has been integrated into a double-metal, single-poly, n-well 1 μm CMOS process, and its performance has been compared to that of similar devices. Test results show that a differential nonlinearity error of ±1%, an integral nonlinearity less than 0.2 least significant hit (LSB), and a time resolution of 0.443 LSB-significantly better than those of comparable TDCs and very close to the theoretical limit of 0.408 LSB-have been achieved
Keywords :
CMOS integrated circuits; convertors; timing circuits; 1 micron; differential nonlinearity error; double-metal single-poly n-well CMOS process; integral nonlinearity; multihit multichannel time-to-digital converter; time resolution; CMOS logic circuits; CMOS process; CMOS technology; Clocks; Counting circuits; Delay lines; Dynamic range; Signal resolution; Time measurement; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of