DocumentCode
1347240
Title
A transistorless-current-mode static RAM architecture
Author
Levy, H.J. ; Daniel, E.S. ; McGill, T.C.
Author_Institution
Thomas J. Watson Lab. of Appl. Phys., California Inst. of Technol., Pasadena, CA, USA
Volume
33
Issue
4
fYear
1998
fDate
4/1/1998 12:00:00 AM
Firstpage
669
Lastpage
672
Abstract
We propose a static memory architecture in which each bit consists of a single two-terminal device that is bistable in current. Current-mode operation of the memory array removes the need for cell-isolation transistors, thus, allowing huge increases in density over inverter-based SRAM and capacitor-based DRAM. Low power consumption and fast read/write speeds are ensured by taking advantage of the exponential nature of the memory´s current-voltage characteristic
Keywords
SRAM chips; memory architecture; tunnel diodes; SRAM architecture; current-mode operation; current-voltage characteristic; fast read/write speeds; low power consumption; static memory architecture; transistorless-current-mode configuration; tunnel switch diode; Circuits; Current-voltage characteristics; Energy consumption; Memory architecture; Microprocessors; Random access memory; Read-write memory; Silicon; Switches; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.663578
Filename
663578
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