Title :
Television noise reduction IC
Author :
de Haan, G. ; Kwaaitaal-Spassova, T.G. ; Larragy, M.M. ; Ojo, O.A. ; Schutten, R.J.
Author_Institution :
Philips Semicond., Eindhoven, Netherlands
fDate :
2/1/1998 12:00:00 AM
Abstract :
A noise reduction IC for consumer television has been designed. The IC contains a spatial filter for Gaussian noise and a temporal filter for clamp noise. To reduce clamp noise, the average value of the pixels in a line-segment are filtered rather than individual pixels. This reduces the cost of the temporal filter significantly, enabling the use of embedded memory. Analog interfaces are provided, as well as a line-locked clock generator. The chip includes a noise level estimator for optimal filtering under varying reception conditions. The average gain of the spatial filter is around 3 dB, whereas the temporal filter yields up to 8 dB improvement on clamp noise
Keywords :
CMOS digital integrated circuits; Gaussian noise; consumer electronics; digital filters; integrated circuit design; interference suppression; recursive filters; spatial filters; television interference; television receivers; video signal processing; 3 dB; 8 dB; Gaussian noise; analog interfaces; clamp noise; consumer television; embedded memory; line-locked clock generator; line-segment; noise level estimator; optimal filtering; spatial filter; television noise reduction IC; temporal filter; varying reception conditions; Clamps; Clocks; Costs; Filtering; Gaussian noise; Integrated circuit noise; Noise level; Noise reduction; Spatial filters; TV;
Journal_Title :
Consumer Electronics, IEEE Transactions on
