DocumentCode
1347515
Title
Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization
Author
Xiaoming Chen ; Yu Wang ; Yu Cao ; Yuchun Ma ; Huazhong Yang
Author_Institution
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
Volume
20
Issue
11
fYear
2012
Firstpage
2143
Lastpage
2147
Abstract
As technology scales, negative bias temperature instability (NBTI) has become a major reliability concern for circuit designers. And the growing process variations can no longer be ignored. Meanwhile, reducing power consumption remains to be one of the design goals. In this paper, a variation-aware supply voltage assignment (SVA) technique combining dual Vdd assignment and dynamic Vdd scaling is proposed on a statistical platform, to minimize circuit power under an aging-aware timing constraint. The experimental results show that our SVA technique can mitigate on average 62% of the NBTI-induced circuit delay degradation. Compared with guard-banding and single Vdd scaling approaches, our approach saves more energy.
Keywords
integrated circuit design; integrated circuit reliability; low-power electronics; NBTI-induced circuit delay degradation; aging optimization; aging-aware timing constraint; circuit designer; circuit power minimisation; energy saving; negative bias temperature instability; power consumption reduction; reliability concern; simultaneous power optimization; statistical platform; variation-aware supply voltage assignment; Degradation; Delay; Integrated circuit modeling; Leakage current; Negative bias temperature instability; Dynamic power; leakage power; negative bias temperature instability (NBTI); supply voltage assignment (SVA);
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2011.2168433
Filename
6042352
Link To Document