DocumentCode :
1347928
Title :
Design of minimum and uniform bipartites for optimum connection blocks of FPGA
Author :
Fujiyoschi, K. ; Kajitani, Yoji ; Niitsu, Hiroshi
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Univ. of Agric. & Technol., Japan
Volume :
16
Issue :
11
fYear :
1997
fDate :
11/1/1997 12:00:00 AM
Firstpage :
1377
Lastpage :
1383
Abstract :
The design of optimum connection blocks of field programmable gate arrays (FPGA´s) in number and in distribution of switches is formulated as a bipartite graph design problem and solved. A bipartite with vertex sets R and L (|R|⩽|L|) is called totally perfect if there is a perfect matching from Ls to R for any Ls⊂L with |Ls|⩽|R|. The difference of maximum and minimum degrees of the vertices in L or R is called the skew of the respective vertex set. The problem is to construct a minimum totally perfect bipartite graph with the minimum skew. The result shows that a method, biscattering, can construct such a matrix in O(|R|×|L|) time where the lower bound is attained for both skews. This construction also solves the problem of designing optimum direct-concentrators
Keywords :
field programmable gate arrays; graph theory; logic design; FPGA design; bipartite graph design problem; biscattering; field programmable gate arrays; matrix; minimum bipartites; minimum skew; optimum connection blocks; optimum direct-concentrators; uniform bipartites; Agricultural engineering; Agriculture; Bipartite graph; Costs; Field programmable gate arrays; Manufacturing; Pins; Programmable logic arrays; Switches; Telegraphy;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.663827
Filename :
663827
Link To Document :
بازگشت