Safety issues in the comparative analysis of dependable architectures

Author

Choi, Charles Y. ; Johnson, Barry W. ; Profeta, Joseph A., III

Author_Institution

Virginia Univ., Charlottesville, VA, USA

Volume

46

Issue

3

fYear

1997

fDate

9/1/1997 12:00:00 AM

Firstpage

316

Lastpage

322

Abstract

This paper illustrates the value of analytical techniques for the safety analysis of dependable architectures at the system level. Its important contributions are: (1) comparative analysis of five common hardware architectures for life-critical applications; (2) demonstration of the effect of various coverage parameters on system safety; and (3) illustration of important metrics in evaluating system safety. Discrete space, CTMC (continuous time Markov chains) are used to model the five architectures at the building block level: a simplex architecture; two gracefully degrading architectures with and without repair; and two hard-failing architectures

Keywords

Markov processes; failure analysis; reliability theory; safety; comparative analysis; dependable architectures; discrete space continuous time Markov chains; hardware architectures; life-critical applications; reliability analysis; safety issues; Costs; Degradation; Digital systems; Failure analysis; Fault tolerance; Safety; Steady-state; Switches; System analysis and design; Voting;

fLanguage

English

Journal_Title

Reliability, IEEE Transactions on

Publisher

ieee

ISSN

0018-9529

Type

jour

DOI

10.1109/24.664002

Filename

664002