DocumentCode :
1349123
Title :
High Performance of Ge nMOSFETs Using \\hbox {SiO}_{2} Interfacial Layer and TiLaO Gate Dielectric
Author :
Chen, W.B. ; Chin, Albert
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
31
Issue :
1
fYear :
2010
Firstpage :
80
Lastpage :
82
Abstract :
Using a SiO2 interfacial layer and a high-?? gate TiLaO dielectric, the TaN/TiLaO/SiO2 on Ge/Si nMOSFETs in this study showed a small 1.1-nm capacitance equivalent thickness, a good high field mobility of 201 cm2/(V ?? s) at 0.5 MV/cm, and a very low off-state leakage current of 3.5 ?? 10-10 A/??m. The self-aligned and gate-first metal-gate/high-?? and Ge nMOSFETs were processed using standard ion implantation and 550??C RTA. The proposed devices are fully compatible with current VLSI fabrication methods.
Keywords :
MOSFET; capacitance; germanium; ion implantation; leakage currents; silicon compounds; titanium compounds; Ge; Si; SiO2 interfacial layer; SiO2; TaN-TiLaO-SiO2; TiLaO; TiLaO gate dielectric; capacitance equivalent thickness; ion implantation; leakage current; nMOSFET; Ge; TaN; TiLaO; nMOSFETs;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2009.2035719
Filename :
5345768
Link To Document :
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