DocumentCode :
1349694
Title :
One-hot residue coding for low delay-power product CMOS design
Author :
Chren, William A., Jr.
Author_Institution :
Sch. of Eng., Grand Valley State Univ., Grand Rapids, MI, USA
Volume :
45
Issue :
3
fYear :
1998
fDate :
3/1/1998 12:00:00 AM
Firstpage :
303
Lastpage :
313
Abstract :
CMOS implementations of arithmetic circuits for One-Hot Residue (OHR) encoded operands are presented. They are shown to possess SPICE-simulated delay-power (DP) products that are significantly reduced below those of their binary number system counterparts (ripple-carry adder and Wallace tree multiplier). The reduction is attributable to the one-hot representation, which decreases the number of critical path transistors and signal activity factors. An OHR-based direct digital frequency synthesizer for frequency-hopped communication systems is presented, and analytical estimates of its DP-product are derived. The design exhibits a DP-product reduction in excess of 90% below that of a binary-encoded residue synthesizer
Keywords :
CMOS digital integrated circuits; SPICE; arithmetic codes; delays; direct digital synthesis; frequency hop communication; integrated circuit design; residue number systems; CMOS design; SPICE simulation; arithmetic circuit; critical path transistor number; delay-power product; direct digital frequency synthesizer; frequency-hopped communication system; one-hot residue coding; signal activity factor; Adders; Arithmetic; Circuits; Clocks; Delay; Encoding; Frequency estimation; Frequency synthesizers; MOSFETs; Product design;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.664236
Filename :
664236
Link To Document :
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