• DocumentCode
    1350055
  • Title

    Analysis and Modeling of Thermomechanically Improved Silver-Sintered Die-Attach Layers Modified by Additives

  • Author

    Heuck, Nicolas ; Langer, Armin ; Stranz, Andrej ; Palm, Gerhard ; Sittig, Roland ; Bakin, Andrey ; Waag, Andreas

  • Author_Institution
    Inst. of Semicond. Technol., Braunschweig Univ. of Technol., Braunschweig, Germany
  • Volume
    1
  • Issue
    11
  • fYear
    2011
  • Firstpage
    1846
  • Lastpage
    1855
  • Abstract
    The pressure-assisted sintering of a sub-micrometer silver paste-sometimes called “silver-sintering” or “low temperature joining technique (LTJT)”-is already used in many power electronics industry applications and provides die-attach layers with excellent mechanical, electrical, and thermal properties. The present challenge is to fit both the coefficient of thermal expansion (CTE) and the mechanical properties of the die-attach layer to the characteristics of chip and substrate to reduce the thermal stress occurring in the attach layer during temperature cycling. After evaluating the impact of the CTE of the sintered die-attach layer on the thermomechanical stress in a whole chip-to-substrate system, we demonstrate that adding special filling materials like SiC or h-BN particles to the silver-powder leads to a significant reduction of the CTE. Further measurements show that thereby the mechanical stability and the electrical conductivity are reduced in an acceptable range. In order to provide a tool for predicting the influence of additives on the LTJT layers´ elasticity and thermal expansion, these properties are modeled based on the amount and type of the additive. Finally, the resulting stress reduction caused by implementation of the modified sinter-layers is estimated by employing finite elements method simulation.
  • Keywords
    additives; electrical conductivity; electronics industry; finite element analysis; joining processes; mechanical stability; microassembling; silver; sintering; thermal expansion; thermal stresses; CTE; LTJT layers; chip-to-substrate system; coefficient of thermal expansion; die-attach layers; electrical conductivity; electrical property; filling materials; finite element method simulation; low temperature joining technique; mechanical property; mechanical stability; modified sinter-layers; power electronics industry applications; silver-powder; stress reduction; thermal property; thermal stress; thermomechanically improved silver-sintered die-attach layers; Additives; Conductivity; Silicon carbide; Stress measurement; Thermal expansion; Young´s modulus; Coefficient of thermal expansion; low temperature joining technique; modeling; porous materials;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2011.2167154
  • Filename
    6045323