II. Needed: A `miracle slice¿ for VLSI fabrication

For pt.I see ibid., vol.16, no.3, p.42 (1979). To achieve VLSI means micron and submicron design rules. It means large chips containing perhaps 100000 to 500000 gates, and it means perhaps processing power of a million instructions per second on a single chip. Clearly further ground must be broken in materials, patterning, processing, layout, design and testing, as well as architecture. Requirements for resistivities of more than 100 Ω-cm or minority carrier lifetimes of 500 μs may not be met with conventional silicon boule growth techniques. Silicon device yield and performance are limited by defects and impurity centers in the bulk, surface, and interface regions of the device structure. These can be intrinsic to the starting wafer or process induced. A final requirement for the miracle slice is that it be optically flat with a structurally perfect surface for whatever noncontact lithography technique is used, whether optical projection, projection step-and-repeat, E-beam, or X-ray.