A thermal and congestion driven global router for 3D integrated circuits

Author

Roy, Debashri ; Ghosal, Prasun ; Das, Nabanita

Author_Institution

Dept. of IT, Bengal Eng. & Sci. Univ., Shibpur, India

fYear

2014

fDate

Feb. 28 2014-March 2 2014

Firstpage

303

Lastpage

308

Abstract

During recent days, the large problem space of very large scale integrated (VLSI) circuits has led global routing problem to a NP Complete one. With the advent of three dimensional integrated circuits (3D IC) the problem has become more complex. In this paper, a multi-objective global routing technique is formulated using fuzzy logic to get rid of the limitations of deterministic approaches. During global routing the decision is taken from a fuzzy logic expert system depending upon some generated pre-routing guiding information. Proposed approach is mainly focused on the modern generation 3D ICs. This primary work is mainly incorporated in the standard cell design for 3D ICs. A two-pin global router tool is designed based on the proposed algorithm resulting 85-97% routability in negligible time for ISPD´98 benchmarks.

Keywords

VLSI; benchmark testing; fuzzy logic; integrated circuit design; integrated circuit testing; three-dimensional integrated circuits; 3D integrated circuits; ISPD´98 benchmarks; VLSI; congestion driven global router; fuzzy logic; multiobjective global routing; very large scale integrated circuits; Benchmark testing; Expert systems; Fuzzy logic; Integrated circuits; Routing; Sensitivity; Three-dimensional displays; 3D Global Routing; 3D Integrated Circuits; Fuzzified Global Routing; Fuzzy Expert System; VLSI Layout Design;

fLanguage

English

Publisher

ieee

Conference_Titel

Students' Technology Symposium (TechSym), 2014 IEEE

Conference_Location

Kharagpur

Print_ISBN

978-1-4799-2607-7

Type

conf

DOI

10.1109/TechSym.2014.6808065

Filename

6808065