Title :
A VLSI array processor for 16-point FFT
Author :
Lee, Moon-Key ; Shin, Kyung-Wook ; Lee, Jang-Kyu
Author_Institution :
Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea
fDate :
9/1/1991 12:00:00 AM
Abstract :
An implementation of a two-dimensional array processor for fast Fourier transform (FFT) using a 2-μm CMOS technology is presented. The array processor, which is dedicated to 16-point FFT, implements a 4×4 mesh array of 16 processing elements (PEs) working in parallel. Design considerations in both the chip level and the PE level are examined. A layout design methodology based on bit-slice units (BSUs) results in a very simple design, easy debugging, and a regular interconnection scheme through abutment. It contains about 48,000 transistors on an area of 53.52 mm2, excluding the 83-pad area, and operation is on a 15-MHz clock. The array processor performs 24.6 million complex multiplications per second, and computes a 16-point FFT in 3 μs
Keywords :
CMOS integrated circuits; VLSI; circuit layout; computerised signal processing; digital signal processing chips; fast Fourier transforms; parallel architectures; 15 MHz; 16-point FFT; 2 micron; CMOS technology; DSP chip; VLSI array processor; bit-slice units; fast Fourier transform; layout design methodology; mesh array; regular interconnection scheme; two-dimensional array processor; Application software; Arithmetic; CMOS technology; Digital signal processing; Elevators; Fast Fourier transforms; Hardware; Parallel processing; Signal processing algorithms; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
