DC-line current ripple reduction of a parallel hybrid modular multilevel HVDC converter

Parallel hybrid modular multilevel converter (PH-MMC) is one of the potential converter topologies for highvoltage direct-current (HVDC) transmission systems. Due to the circuit topology of a PHMMC, the dc-bus voltage contains low-order harmonics and cannot be fully regulated at a constant dc voltage. This paper proposes a zero-sequence voltage injection (ZSVI)-based model predictive control (MPC) strategy to control the dc current/power flow and simultaneously minimize the dc-current ripple. The proposed strategy takes the advantage of a cost function minimization technique to determine and inject the optimal zero-sequence voltage components into the dc-bus voltage of a PHMMC system. Performance of the proposed strategy for a 21-level PHMMC-based HVDC station system is evaluated in the PSCAD/EMTDC software environment. The reported results demonstrate the proposed ZSVI-MPC strategy can regulate the dc current while reducing its ripple.