A large-signal equivalent circuit model for substrate-induced drain-lag phenomena in HJFETs

Author

Kunihiro, Kazuaki ; Ohno, Yasuo

Author_Institution

Opto-Electron. Res. Labs., NEC Corp., Ibaraki, Japan

Volume

43

Issue

9

fYear

1996

fDate

9/1/1996 12:00:00 AM

Firstpage

1336

Lastpage

1342

Abstract

A large-signal HJFET model is developed for drain-lag phenomena caused by deep traps beneath the channel. The model is based on the self-backgating and Shockley-Read-Hall (SRH) statistics. It is shown by two-dimensional (2D) device simulation that electron capture in deep traps is much faster than electron emission under large-signal conditions; therefore, drain current exhibits different responses for rising and falling steps of applied voltage. In the circuit model, electron capture and emission in deep traps are expressed by a parallel circuit consisting of a diode and a resistor, which are physically deduced from SRH statistics. The model agrees well with the 2D simulation results and experimental current-transient data for large-signal voltage steps. In addition, this model accurately describes small-signal drain-conductance dispersion and temperature effects on the trapping phenomena

Keywords

SPICE; deep levels; electron traps; equivalent circuits; junction gate field effect transistors; semiconductor device models; semiconductor device reliability; 2D device simulation; HJFETs; Shockley-Read-Hall statistics; applied voltage; current-transient data; deep traps; electron capture; large-signal equivalent circuit model; parallel circuit; self-backgating; small-signal drain-conductance dispersion; substrate-induced drain-lag phenomena; temperature effects; Circuit simulation; Diodes; Dispersion; Electron emission; Electron traps; Equivalent circuits; Radioactive decay; Resistors; Statistics; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.535316

Filename

535316