Title :
Optimization of Dilution and Mixing of Biochemical Samples Using Digital Microfluidic Biochips
Author :
Roy, Sandip ; Bhattacharya, Bhargab B. ; Chakrabarty, Krishnendu
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Kharagpur, Kharagpur, India
Abstract :
The recent emergence of lab-on-a-chip (LoC) technology has led to a paradigm shift in many healthcare-related application areas, e.g., point-of-care clinical diagnostics, high-throughput sequencing, and proteomics. A promising category of LoCs is digital microfluidic (DMF)-based biochips, in which nanoliter-volume fluid droplets are manipulated on a 2-D electrode array. A key challenge in designing such chips and mapping lab-bench protocols to a LoC is to carry out the dilution process of biochemical samples efficiently. As an optimization and automation technique, we present a dilution/mixing algorithm that significantly reduces the production of waste droplets. This algorithm takes O(n) time to compute at most n sequential mix/split operations required to achieve any given target concentration with an error in concentration factor less than [1/(2n)]. To implement the algorithm, we design an architectural layout of a DMF-based LoC consisting of two O(n)-size rotary mixers and O(n) storage electrodes. Simulation results show that the proposed technique always yields nonnegative savings in the number of waste droplets and also in the total number of input droplets compared to earlier methods.
Keywords :
bioMEMS; biochemistry; biomedical equipment; drops; electrodes; lab-on-a-chip; microfluidics; mixing; optimisation; DMF-based LoC; O(n) storage electrodes; O(n)-size rotary mixers; biochemical samples; digital microfluidic biochips; dilution optimization; dilution-mixing algorithm; sequential mix-split operations; waste droplets; Algorithm design and analysis; Arrays; Design automation; Electrodes; Layout; Optimization; System-on-a-chip; Biochips; computer-aided-design; digital microfluidics (DMFs); dilution of biosamples; mixing algorithms; waste minimization;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2010.2061790