A programmable self-adaptive digital frequency multiplier

Existing self-adaptive frequency multipliers work well if the master clock frequency is an integral multiple of the input signal frequency; otherwise they lose an output pulse after a certain interval of time. The frequency of this missing pulse could be as high as half of the input frequency. Since existing self-adaptive frequency multipliers are not programmable, the multiplication factor can not be changed without doing some major changes in the hardware. The reason for missing an output pulse is explained, and design and implementation of a programmable self-adaptive digital frequency multiplier, that does not have this missing pulse problem are presented. The errors associated with the multiplier are discussed