DocumentCode :
1357815
Title :
Symmetry within the sequence-pair representation in the context of placement for analog design
Author :
Balasa, Florin ; Lampaert, Koen
Author_Institution :
Illinois Univ., Chicago, IL, USA
Volume :
19
Issue :
7
fYear :
2000
fDate :
7/1/2000 12:00:00 AM
Firstpage :
721
Lastpage :
731
Abstract :
This paper addresses the problem of device-level placement for analog layout, focusing mainly on symmetry-related aspects. Different from most of the existent analog placement approaches, employing basically simulated annealing optimization algorithms operating on flat (absolute) spatial representations, our model uses a more recent topological representation called sequence-pair, which has the advantage of not being restricted to slicing floorplan topologies. In this paper, we explain how specific features essential to analog placement, such as the ability to deal with complex symmetry constraints (for instance, an arbitrary number of symmetry groups of cells), can be easily handled by employing the sequence-pair representation. Several analog examples substantiate the effectiveness of our placement tool, which is already in use in an industrial environment
Keywords :
VLSI; analogue integrated circuits; circuit layout CAD; integrated circuit layout; network topology; simulated annealing; VLSI; analog design; complex symmetry constraints; device-level placement; industrial environment; placement tool; sequence-pair representation; simulated annealing; spatial representations; symmetry-related aspects; Analog integrated circuits; Cost function; Digital integrated circuits; Integer linear programming; Libraries; Merging; Simulated annealing; Size measurement; Topology; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.851988
Filename :
851988
Link To Document :
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