• DocumentCode
    1358072
  • Title

    Power Management of Datacenter Workloads Using Per-Core Power Gating

  • Author

    Leverich, Jacob ; Monchiero, Matteo ; Talwar, Vanish ; Ranganathan, Partha ; Kozyrakis, Christos

  • Volume
    8
  • Issue
    2
  • fYear
    2009
  • Firstpage
    48
  • Lastpage
    51
  • Abstract
    While modern processors offer a wide spectrum of software-controlled power modes, most datacenters only rely on dynamic voltage and frequency scaling (DVFS, a.k.a. P-states) to achieve energy efficiency. This paper argues that, in the case of datacenter workloads, DVFS is not the only option for processor power management. We make the case for per-core power gating (PCPG) as an additional power management knob for multi-core processors. PCPG is the ability to cut the voltage supply to selected cores, thus reducing to almost zero the leakage power for the gated cores. Using a testbed based on a commercial 4-core chip and a set of real-world application traces from enterprise environments, we have evaluated the potential of PCPG. We show that PCPG can significantly reduce a processor´s energy consumption (up to 40%) without significant performance overheads. When compared to DVFS, PCPG is highly effective saving up to 30% more energy than DVFS. When DVFS and PCPG operate together they can save up to almost 60%.
  • Keywords
    computer centres; microprocessor chips; power consumption; data center workloads; dynamic voltage and frequency scaling; energy efficiency; enterprise environments; leakage power; multicore processors; per-core power gating; processor energy consumption; processor power management; software-controlled power modes; Energy-aware systems; System architectures; integration and modeling;
  • fLanguage
    English
  • Journal_Title
    Computer Architecture Letters
  • Publisher
    ieee
  • ISSN
    1556-6056
  • Type

    jour

  • DOI
    10.1109/L-CA.2009.46
  • Filename
    5224259