Title :
Analyze jitter to improve high-speed design
Author :
Lauterbach, Michael ; Wey, Todd
Author_Institution :
LeCroy Corp., Chestnut Ridge, NY, USA
fDate :
7/1/2000 12:00:00 AM
Abstract :
The authors describe how, in order to overcome timing jitter-the nemesis of high-speed design engineers-its source must be known. They detail how, to divine its source, thousands of signal observations must be collected and scrutinized to uncover flaws
Keywords :
high-speed integrated circuits; integrated circuit design; timing jitter; circuit flaws; design engineers; design improvement; high-speed circuit design; jitter source detection; signal observations; timing jitter; Design engineering; Timing jitter;
Journal_Title :
Spectrum, IEEE
