Radiation-Hardened Reconfigurable Array With Instruction Roll-Back

Author

Chalamalasetti, Sai Rahul ; Purohit, Sohan ; Margala, Martin ; Vanderbauwhede, Wim

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Lowell, Lowell, MA, USA

Volume

2

Issue

4

fYear

2010

Firstpage

123

Lastpage

126

Abstract

This letter presents the design and evaluation of a coarse grained reconfigurable array, hardened against radiation induced transient errors. The architecture consists of an 8 × 8 array of reconfigurable cells, each provided with a built-in soft error detection and instruction roll-back control. We also present the communication management scheme between the processors in the presence of varying degrees of single event upsets. The impact on throughput while evaluating an 8 × 8 discrete wavelet transform (DWT) and 8 × 8 discrete cosine transform (DCT) are also presented.

Keywords

discrete cosine transforms; discrete wavelet transforms; error detection; parallel processing; radiation hardening (electronics); reconfigurable architectures; communication management; discrete cosine transform; discrete wavelet transform; instruction roll back control; parallel processing; radiation hardened reconfigurable array; reconfigurable cell; soft error detection; transient error; Discrete cosine transforms; Discrete wavelet transforms; Parallel processing; Radiation hardening; Reconfigurable architectures; Single event upset; Instruction roll-back; parallel processing; reconfigurable systems; soft errors;

fLanguage

English

Journal_Title

Embedded Systems Letters, IEEE

Publisher

ieee

ISSN

1943-0663

Type

jour

DOI

10.1109/LES.2010.2089428

Filename

5607284