DocumentCode
1358994
Title
A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
Author
Silveira, F. ; Flandre, D. ; Jespers, P.G.A.
Author_Institution
Inst. de Ingenieria Electr., Univ. de la Republica, Montevideo, Uruguay
Volume
31
Issue
9
fYear
1996
fDate
9/1/1996 12:00:00 AM
Firstpage
1314
Lastpage
1319
Abstract
A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over DC drain current gm/ID and the normalized current ID/(W/L). The gm/ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA)
Keywords
CMOS analogue integrated circuits; differential amplifiers; integrated circuit design; operational amplifiers; silicon-on-insulator; CMOS analog circuits; MOS transistor; SOI micropower OTA; Si; design methodology; gm/ID based methodology; low power circuits; operational transconductance amplifier; transconductance; Analog circuits; Analytical models; CMOS analog integrated circuits; Circuit synthesis; Design methodology; Energy consumption; MOSFETs; Operational amplifiers; Silicon on insulator technology; Transconductance;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.535416
Filename
535416
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