Towards Process Variation-Aware Power Gating

This paper presents a power gating design that considers process variation for proper wakeup control. First, the surge current constraint is examined and refined for a simpler and more realistic view of inter-module reliability. Following that, several circuits are proposed on top of a delay chain to adapt the timing control of power switches to process variations. Experimental results show that the proposed design is able to track process variation such that the surge current and the wakeup time are both kept to expectation in all process corners.