Low-voltage C-band Si BJT single-chip receiver MMIC based on Si 3D MMIC technology

Author

Nishikawa, Kenjiro ; Kamogawa, Kenji ; Nakagawa, Tadao ; Tanaka, Masayoshi

Author_Institution

NTT Network Innovation Labs., Yokosuka, Japan

Volume

10

Issue

6

fYear

2000

fDate

6/1/2000 12:00:00 AM

Firstpage

248

Lastpage

250

Abstract

This letter demonstrates a C-band Si BJT MMIC single-chip receiver based on the masterslice 3D MMIC technology. The fabricated receiver MMIC on a chip of 1.8 mm by 1.8 mm integrates a low-noise amplifier, an image-rejection mixer, and an IF hybrid associated with an IF amplifier. The fabricated components on the chip are designed by using reactive matching method due to both broadband and low-voltage operation. The receiver MMIC achieves a conversion gain of 13.5 dB, a noise figure of 5.2 dB, and an image rejection ratio of 30.6 dB at 5.2 GHz. This receiver also has a flat gain characteristic in the C-band. The power consumption of this MMIC is 115 mW with 2 V collector supply voltage

Keywords

bipolar MMIC; elemental semiconductors; impedance matching; low-power electronics; microwave receivers; silicon; 115 mW; 13.5 dB; 2 V; 5.2 GHz; 5.2 dB; BJT single-chip receiver MMIC; C-band; IF hybrid; Si; broadband operation; collector supply voltage; conversion gain; flat gain characteristic; image rejection ratio; image-rejection mixer; low-noise amplifier; low-voltage operation; masterslice 3D MMIC technology; power consumption; reactive matching method; Aluminum; Costs; Intelligent transportation systems; Laboratories; Low-noise amplifiers; MIM capacitors; MMICs; Mobile communication; Radiofrequency identification; Voltage;

fLanguage

English

Journal_Title

Microwave and Guided Wave Letters, IEEE

Publisher

ieee

ISSN

1051-8207

Type

jour

DOI

10.1109/75.852431

Filename

852431