DocumentCode :
1360653
Title :
Shmoo plotting: the black art of IC testing
Author :
Baker, Keith ; van Beers, Jos
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Volume :
14
Issue :
3
fYear :
1997
Firstpage :
90
Lastpage :
97
Abstract :
Obtaining higher yields from IC fabrication is a never ending goal. Toward that end, shmoo plotting can help bridge the gap between design and test and ultimately show ways to improve a product, process, or manufacturing test program
Keywords :
integrated circuit manufacture; integrated circuit testing; integrated circuit yield; IC fabrication; IC testing; higher yields; manufacturing test program; shmoo plotting; Art; Automotive engineering; Integrated circuit testing; MOSFETs; Manufacturing processes; Printing; Production; Subspace constraints; Temperature distribution; Voltage;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.606005
Filename :
606005
Link To Document :
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