DocumentCode
1360950
Title
High performance SONOS memory cells free of drain turn-on and over-erase: compatibility issue with current flash technology
Author
Cho, Myung Kwan ; Kim, Dae M.
Author_Institution
Memory Div., Samsung Electron. Co. Ltd., Kyungki, South Korea
Volume
21
Issue
8
fYear
2000
Firstpage
399
Lastpage
401
Abstract
Nonvolatile SONOS memory cells, fabricated by standard flash EEPROM technology are characterized, in comparison with floating gate memory devices. Its programming speed is comparable with the state-of-the-art flash EEPROM cells, while the erase speed is faster and over-erase-free. The SONOS cells do not suffer from the drain turn-on effect, making it is possible to perform parallel multi bit-line programming and to achieve tighter distributions of programmed and erased threshold voltages. These features render SONOS cells attractive for direct utilization in existing flash EEPROM technology with its forward reading scheme.
Keywords
CMOS memory circuits; PLD programming; flash memories; 0.35 micron; CMOS technology; SONOS memory cells; compatibility issue; drain turn-on free cells; flash EEPROM technology; high performance memory cells; over-erase free memory cells; parallel multi bit-line programming; programming speed; threshold voltages; CMOS technology; Dielectrics; EPROM; Electron traps; Isolation technology; Nonvolatile memory; Oxidation; Parallel programming; SONOS devices; Threshold voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.852963
Filename
852963
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