DocumentCode :
1361749
Title :
Nanowire to Single-Electron Transistor Transition in Trigate SOI MOSFETs
Author :
Akhavan, Nima Dehdashti ; Afzalian, Aryan ; Lee, Chi-Woo ; Yan, Ran ; Ferain, Isabelle ; Razavi, Pedram ; Yu, Ran ; Fagas, Giorgos ; Colinge, Jean-Pierre
Author_Institution :
Tyndall Nat. Inst., Univ. Coll. Cork, Cork, Ireland
Volume :
58
Issue :
1
fYear :
2011
Firstpage :
26
Lastpage :
32
Abstract :
We investigate the effect of symmetrical geometrical constrictions on the electrical characteristics of ultrathin silicon-on-insulator nanowires with a trigate structure using a 3-D numerical quantum simulator. Introducing barriers at the source and drain junctions profoundly alter the device physics and a transition from 1-D to 0-D quantum behavior is observed. The constrictions create resonance levels in the channel region of nanowire due to confinement in the three directions of space, which, in turn, causes oscillation of the ID-VGS characteristic. Based on the observed characteristics, we derive a set of parameters that draws the line between 1-D and 0-D quantum behavior of silicon nanowire transistors.
Keywords :
MOSFET; nanowires; silicon-on-insulator; single electron transistors; 3D numerical quantum simulator; silicon nanowire transistors; single-electron transistor transition; trigate SOI MOSFET; ultrathin silicon-on-insulator nanowires; Electric potential; Energy states; Logic gates; Mathematical model; Nanoscale devices; Oscillators; Transistors; 3-D device modeling; low temperature; low-dimensional structures; quantum transport; silicon nanowire transistor; tunnel-barrier field-effect transistor (FET);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2010.2084390
Filename :
5610985
Link To Document :
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