Contamination control in Axcelis Purion platform ion implanters

Industry consolidation in semiconductor manufacturing, driven by commoditization and decreasing margins, is placing ever increasing pressure on fab productivity. Concomitant technology innovation, shrinking device geometries, the transition to non-planar transistors and novel device structures (such as CIS or IGBT) make yield attainment increasingly challenging. The defect level performance of semiconductor manufacturing equipment, in particular in ion implantation, is one of the critical parameters contributing to overall yield performance. This is evidenced through recent large shifts in both particle and metals requirements from device manufacturers. Traditional implanter design approaches, focused on glitch reduction or beam current modulation, are necessary but insufficient to attain simultaneous compliance of availability, throughput and defect levels. In this paper, a holistic approach to defect control is detailed. Examples of contamination control best practices are described. These are combined into an overarching design for process cleanliness (DfPC) methodology, through identification and mitigation of defect opportunities (particulates, metals). Data from the Purion platform of ion implanters demonstrate that, through application of an integrated, common design method, required defect performance can be attained across multiple ion implant platforms.