DocumentCode :
1361897
Title :
Cost/benefit analysis of the P1149.4 mixed-signal test bus
Author :
Sunter, S.K.
Author_Institution :
LogicVision Inc., Ottawa, Ont., Canada
Volume :
143
Issue :
6
fYear :
1996
fDate :
12/1/1996 12:00:00 AM
Firstpage :
393
Lastpage :
398
Abstract :
After briefly describing the proposed IEEE P1149.4 mixed-signal test bus standard and its salient benefits, the author investigates detailed costs of implementing the standard on ICs. The benefits include continuous time access in voltage and current mode, measurement of parameters such as resistance, capacitance and delay, and true differential access. The cost increase can vary between 3 and 35%, depending on the initial die size and whether 1149.1 is already on the IC. Lastly, proposed alternatives and future acceptance are discussed
Keywords :
automatic testing; delays; integrated circuit testing; mixed analogue-digital integrated circuits; standards; P1149.4 mixed-signal test bus; capacitance; continuous time access; current mode; delay; initial die size; standard; true differential access; voltage mode;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:19960899
Filename :
561141
Link To Document :
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