• DocumentCode
    1362144
  • Title

    Floorplanning Considering IR Drop in Multiple Supply Voltages Island Designs

  • Author

    Zhou, Qiang ; Shi, Jin ; Bin Liu ; Cai, Yici

  • Author_Institution
    Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
  • Volume
    19
  • Issue
    4
  • fYear
    2011
  • fDate
    4/1/2011 12:00:00 AM
  • Firstpage
    638
  • Lastpage
    646
  • Abstract
    Voltage island has become a very effective design style for power saving in low-power design. However, the new design style also brings forward new challenges, especially to the designers of power/ground (P/G) networks. In this paper, we study the power delivery problem in voltage island designs, and propose to consider voltage drop during the floorplanning process to reduce design iterations. Our analysis shows that it is unnecessary to consider the pitch of the P/G network in the floorplan stage. By using the simplified searching strategy in floorplanning, we can obtain more robust low power design within reasonable runtime. Experimental results have demonstrated the effectiveness of our approach.
  • Keywords
    integrated circuit layout; low-power electronics; IR drop; P-G networks; design iteration reduction; floorplanning process; low-power design; multiple-supply voltage island designs; power delivery problem; power saving; power-ground networks; simplified searching strategy; Design automation; IR drop; floorplanning; low power design; multiple supply voltages;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2009.2037428
  • Filename
    5357444