Effect of high temperature on analog parameters of Asymmetric Self-Cascode SOI nMOSFETs

Author

d´Oliveira, Ligia Martins ; Flandre, Denis ; Pavanello, Marcelo Antonio ; de Souza, M.

Author_Institution

Electr. Eng. Dept., Centro Univ. da FEI, São Bernardo do Campo, Brazil

fYear

2014

fDate

1-5 Sept. 2014

Firstpage

1

Lastpage

4

Abstract

This paper presents an analysis on the high temperature operation of Silicon-on-Insulator (SOI) nMOSFETs in Asymmetric Self-Cascode (A-SC) configuration. For this analysis, experimental results in the range of 300K to 500K of A-SC structures with different channel lengths for both the drain side transistor (MD) and source side transistor (MS) are used. The effect of varying channel length under high temperatures on the A-SC association is evaluated using as figure of merit important analog parameters, such as the intrinsic voltage gain and transconductance over drain current ratio.

Keywords

MOSFET; silicon-on-insulator; A-SC configuration; MD; MS; analog parameters; asymmetric self-cascode SOI nMOSFET; channel lengths; drain current ratio; drain side transistor; figure of merit; intrinsic voltage gain; silicon-on-insulator; source side transistor; transconductance; SOI nMOSFET; analog parameters; asymmetric self-cascode; high temperatures;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics Technology and Devices (SBMicro), 2014 29th Symposium on

Conference_Location

Aracaju

Type

conf

DOI

10.1109/SBMicro.2014.6940135

Filename

6940135