• DocumentCode
    1362882
  • Title

    A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS

  • Author

    Kaul, Himanshu ; Anders, Mark A. ; Mathew, Sanu K. ; Hsu, Steven K. ; Agarwal, Amit ; Krishnamurthy, Ram K. ; Borkar, Shekhar

  • Author_Institution
    Circuit Res. Lab., Intel Corp., Hillsboro, OR, USA
  • Volume
    45
  • Issue
    1
  • fYear
    2010
  • Firstpage
    95
  • Lastpage
    102
  • Abstract
    This paper describes a reconfigurable 4-way SIMD engine fabricated in 45 nm high-k/metal-gate CMOS, targeted for on-die acceleration of vector processing in power-constrained mobile microprocessors. The SIMD accelerator is reconfigured to perform 4-way 16b × 16b multiplies, 32b × 32b multiply, 4-way 16b additions, 2-way 32b additions or 72b addition with single-cycle throughput and wide supply voltage range of operation (1.3 V-230 mV). A reconfigurable 2 × 2 tile of signed 2´s complement 16b multipliers, with conditional carry gating in the 72b sparse tree adder, dual-supplies for voltage hopping, and fine-grained power-gating enables peak energy efficiency of 494GOPS/W (measured at 300 mV, 50°C) with a dense layout occupying 0.081 mm2 while achieving: (i) scalable performance up to 2.8 GHz, 278 mW measured at 1.3 V; (ii) fast single-cycle switching between any operating/idle mode; (iii) configuration-dependent power reduction of up to 41% in total power and 6.5× in active leakage power; (iv) 10× standby leakage reduction during idle mode; (v) deep subthreshold operation measured at 230 mV, 8.8 MHz, 87 ¿W; and (vi) compensation for up to 3× performance variation in ultra-low voltage mode.
  • Keywords
    CMOS integrated circuits; adders; carry logic; microprocessor chips; parallel processing; vector processor systems; 494GOPS/W; conditional carry gating; fine-grained power-gating; frequency 8.8 MHz; high-k/metal-gate CMOS; on-die acceleration; power 87 muW; power-constrained mobile microprocessors; reconfigurable dual-supply 4-way SIMD vector processing accelerator; single instruction multiple data; size 45 nm; sparse tree adder; temperature 50 C; voltage 1.3 V to 230 mV; voltage 300 mV; voltage hopping; Acceleration; CMOS process; Energy measurement; Engines; High K dielectric materials; High-K gate dielectrics; Microprocessors; Power measurement; Throughput; Voltage; Dual-supply; reconfigurable; single instruction multiple data (SIMD); ultra-low voltage; vector processing;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2009.2031813
  • Filename
    5357564