Title :
Self-Consistent SchrÖdinger–Poisson Simulations on Capacitance–Voltage Characteristics of Silicon Nanowire Gate-All-Around MOS Devices With Experimental Comparisons
Author :
Chin, S.K. ; Ligatchev, Valeri ; Rustagi, Subhash C. ; Zhao, Hui ; Samudra, Ganesh S. ; Singh, Navab ; Lo, G.Q. ; Kwong, Dim-Lee
Author_Institution :
Inst. of High Performance Comput., Agency for Sci., Technol. & Res. (A*STAR), Singapore, Singapore
Abstract :
We simulate room temperature capacitance-voltage characteristics of silicon (Si) nanowire gate-all-around MOS structures with radius les 10 nm using a self-consistent Schrodinger- Poisson solver in cylindrical coordinates with full treatment of the transverse quantum confinement. In this paper, we compare our simulation results with the latest capacitance measurements on single Si nanowire pMOS and nMOS devices in the subfemtofarad range. We also propose to probe the density-of-states features of the Si channel from the capacitance-voltage characteristics at room temperature measurements using dC/dV dependence and illustrate the idea by employing the latest measurements, our quantum and Medici (Synopsys) simulations, as well as a simplified analytical model.
Keywords :
MIS devices; Schrodinger equation; elemental semiconductors; nanowires; silicon; stochastic processes; Medici simulations; Si; capacitance-voltage characteristics; density-of-states; nMOS devices; pMOS devices; self-consistent Schrodinger-Poisson simulations; silicon nanowire gate-all-around MOS devices; transverse quantum confinement; Analytical models; Capacitance measurement; Capacitance-voltage characteristics; MOS devices; Nanoscale devices; Nanostructures; Potential well; Quantum capacitance; Silicon; Temperature; Capacitance; MOS; SchrÖdinger–Poisson (SP); gate-all-around; silicon (Si) nanowire;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2009.2028402
