• DocumentCode
    1363706
  • Title

    A high-speed neural analog circuit for computing the bit-level transform image coding

  • Author

    Chang, P.R. ; Hwang, K.S. ; Gong, H.M.

  • Author_Institution
    Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
  • Volume
    37
  • Issue
    3
  • fYear
    1991
  • fDate
    8/1/1991 12:00:00 AM
  • Firstpage
    337
  • Lastpage
    342
  • Abstract
    A Hopfield-type neural network approach is presented which leads to an analog circuit for implementing the bit-level transform image. The computation of a 2D DCT (discrete cosine transform)-based transform coding is shown to solve a quadratic nonlinear programming problem subject to the corresponding 2´s complement binary variables of 2D DCT coefficients. A novel Hopfield-type neural analog circuit designed to perform the DCT-based quadratic nonlinear programming could obtain the desired coefficients of an 8×8 DCT in 2´s complement code within 1 ns with RC=10-8. A programmable analog MOS implementation provides a flexible architecture to realize the DCT-based neural net
  • Keywords
    MOS integrated circuits; encoding; neural nets; picture processing; transforms; 2D DCT based transform coding; Hopfield-type neural network approach; bit-level transform image coding; flexible architecture; high-speed neural analog circuit; programmable analog MOS implementation; quadratic nonlinear programming problem; Analog circuits; Analog computers; Discrete cosine transforms; Hopfield neural networks; Image coding; Image storage; Matrix decomposition; Neural networks; Quadratic programming; Two dimensional displays;
  • fLanguage
    English
  • Journal_Title
    Consumer Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-3063
  • Type

    jour

  • DOI
    10.1109/30.85534
  • Filename
    85534