DocumentCode :
1364005
Title :
Computer-aided design of fault-tolerant VLSI systems
Author :
Karri, Ramesh ; Hogstedt, Karin ; Orailoglu, Alex
Author_Institution :
Massachusetts Univ., Amherst, MA, USA
Volume :
13
Issue :
3
fYear :
1996
Firstpage :
88
Lastpage :
96
Abstract :
The authors present a flexible methodology for compiling an algorithmic description into an equivalent fault-tolerant VLSI circuit and a CAD framework embodying this methodology. Experimental designs illustrate and validate algorithms for automated synthesis of ICs featuring either self-recovery capability or enhanced reliability
Keywords :
fault tolerant computing; logic CAD; very high speed integrated circuits; CAD framework; automated synthesis of ICs; computer-aided design; enhanced reliability; fault-tolerant VLSI; fault-tolerant VLSI circuit; self-recovery; Application software; Checkpointing; Circuit faults; Control system synthesis; Control systems; Design automation; Fault tolerance; Fault tolerant systems; Microarchitecture; Very large scale integration;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.536099
Filename :
536099
Link To Document :
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