Title :
Hot Carrier Effect and Tunneling Effect of Location- and Orientation-Controlled (100)- and (110)-Oriented Single-Grain Si TFTs Without Seed Substrate
Author :
Chen, Tao ; Ishihara, Ryoichi ; Beenakker, Kees
Author_Institution :
Delft Inst. of Microsyst. & Nanoelectron., Delft Univ. of Technol., Delft, Netherlands
Abstract :
We report on high-performance (100)and (110)-oriented single-grain thin-film transistors (SG-TFTs) below 600°C obtained through the orientation-controlled μ-Czochralski process. Surface and in-plane orientation control allows uniformity to approach that of the silicon-on-insulator counterpart. Electron mobilities are 732 cm2/Vs for (100) and 630 cm2/Vs for (110). Devices exhibit stable performance under both gate and drain stress. After applying electrical stress on the gate and the drain for 1000 s, no deterioration in electron mobility was observed for either (100) SG-TFT or (110) SG-TFT. A kink effect was observed in the output characteristic at a high drain voltage. The higher voltage of drain stress enhances impact ionization, which induces an increase in the kink current. At a higher drain bias, interface trap states at the drain side were created, which, in turn, decrease the kink current. "Asymmetric" output characteristics were also observed after the drain bias. The asymmetric performance confirms that the interface traps are generated at the drain side. Under a negative gate bias, electrons tunneling through the drain to the channel dominate the deterioration of the device with a positive shift of the Vth SG-TFT showing more stable performance than poly-Si TFT under different stress conditions.
Keywords :
crystal growth from melt; electron mobility; hot carriers; substrates; thin film transistors; tunnelling; Si; drain stress; electrical stress; electron mobility; gate stress; high drain voltage; high-performance-oriented single-grain thin-film transistors; hot carrier effect; impact ionization; in-plane orientation control; interface traps; kink current; kink effect; negative gate bias; orientation-controlled μ-Czochralski process; oriented single-grain TFT; seed substrate; silicon-on-insulator; surface orientation control; tunneling effect; Electron traps; Impact ionization; Logic gates; Nickel; Silicon; Stress; Surface treatment; Laser crystallization; thin-film transistors (TFTs);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2010.2084089