Title :
Prolog to Analog Circuit Design in Nanoscale CMOS Technologies
Author :
Onnell, R. Ichard O´D
Abstract :
Success in the emerging era of nanoscale analog CMOS devices will depend on recognizing early in the design phase the many physical layout factors that ultimately determine circuit performance. This paper examines several physical design strategies that could lessen the impact of collateral forces that might not otherwise become apparent until the post-layout phase is reached.
Keywords :
Analog circuits; CMOS analog integrated circuits; CMOS technology; Circuit optimization; Circuit simulation; Circuit synthesis; Design for manufacture; Nanoscale devices; Predictive models; Threshold voltage;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/JPROC.2009.2027655
