DocumentCode
1364867
Title
Floating-Gate Corner-Enhanced Poly-to-Poly Tunneling in Split-Gate Flash Memory Cells
Author
Tkachev, Yuri ; Liu, Xian ; Kotov, Alexander
Author_Institution
Silicon Storage Technol., Inc., San Jose, CA, USA
Volume
59
Issue
1
fYear
2012
Firstpage
5
Lastpage
11
Abstract
The poly-to-poly tunneling characteristics in the third-generation SuperFlash memory cell have been analyzed. It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, corner (tip)-enhanced tunneling, asymmetry of the tunneling voltage in forward and reverse directions, strong localization of the tunneling process, and effective suppression of anode hole injection. Furthermore, a new method for measuring the tunneling voltage on a regular FG cell is described. The reliability aspects of corner-enhanced tunneling in the SuperFlash cell are also discussed.
Keywords
flash memories; reliability; tunnelling; anode hole injection; corner-enhanced tunneling; floating-gate corner-enhanced poly-to-poly tunneling; reliability aspects; split-gate flash memory cells; third-generation superflash memory cell; tunneling voltage; Arrays; Charge carrier processes; Current measurement; Electric potential; Modulation; Tunneling; Voltage measurement; Charge-carrier processes; erasable programmable read-only memory (EPROM); tunneling;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2011.2171346
Filename
6064883
Link To Document