An analog BiCMOS integrated circuit for front-end RDS decoder

Author

Baschirotto, A. ; Cassis, M. ; Kirchlechner, P. ; Montecchi, F. ; Palmisano, G. ; Rossi, D.

Author_Institution

Dipartimento di Elettronica, Pavia Univ., Italy

Volume

37

Issue

3

fYear

1991

fDate

8/1/1991 12:00:00 AM

Firstpage

585

Lastpage

591

Abstract

An analog integrated front-end circuit for the RDS (Radio-Data-System) digital decoder is described. The core of the circuit is an 8th-order switched-capacitor (SC) bandpass filter at 57 kHz with linear-phase response in a 3 kHz bandwidth. A low-offset comparator provides the squared signal for the digital decoder. Antialiasing and smoothing filters are also included in the chip, as well as the clock generation for the SC section; few external components are required. Integrated in a high-performance BiCMOS technology, the circuit operates from a single 5-V supply and dissipates 45 mW. The die size is 5 mm²

Keywords

BIMOS integrated circuits; application specific integrated circuits; decoding; linear integrated circuits; radio data systems; radio receivers; switched capacitor filters; 5 V; 57 kHz; Radio-Data-System; SC section; analog BiCMOS integrated circuit; analog integrated front-end circuit; antialiasing filters; clock generation; digital decoder; eighth-order switched-capacitor bandpass filter; front-end RDS decoder; linear-phase response; low-offset comparator; smoothing filters; Band pass filters; Bandwidth; BiCMOS integrated circuits; Capacitors; Clocks; Decoding; Digital filters; Microelectronics; Smoothing methods; Voltage;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.85571

Filename

85571