Title :
Using Ada as an HDL
Author_Institution :
AT&T Bell Labs., Holmdel, NJ, USA
Abstract :
Ada can be used as both a hardware description language and a distributed simulation environment, which results in a uniform approach to the simulation of digital designs. Ada´s synchronization constructs are used in conjunction with techniques for distributed modeling and scheduling to provide a distributed verifier. This technique has been verified for functional and fault simulation and for timing verification. An advantage it has over conventional simulators is that it can execute on a multiprocessor system.<>
Keywords :
Ada; CAD; digital simulation; specification languages; Ada; HDL; digital designs; distributed modeling; distributed scheduling; distributed simulation environment; fault simulation; hardware description language; multiprocessor system; synchronization constructs; timing verification; Circuit faults; Circuit simulation; Computational modeling; Computer simulation; Distributed control; Hardware design languages; Multiprocessing systems; Propagation delay; Timing; Virtual prototyping;
Journal_Title :
Design & Test of Computers, IEEE